Synopsys, a leading US-based electronic design automation (EDA) firm, has announced an expansion of its partnership with Intel, unveiling certified design flows for Intel's upcoming 14A process technology. The announcement, made on 27 July 2026, is seen as a strategic move to bolster Intel's foundry ambitions and provide chip designers with validated tools to create next-generation semiconductors.
The certified flows cover key stages of chip design, including synthesis, place-and-route, and sign-off verification, all optimised for Intel's 14A node. Synopsys stated that the collaboration will enable customers to achieve better power, performance, and area (PPA) targets while reducing the risk of design re-spins. The 14A node is expected to leverage Intel's advanced transistor architecture, including RibbonFET and PowerVia technologies.
For the UK semiconductor ecosystem, this development signals continued investment in cutting-edge manufacturing outside Asia. UK-based chip design firms and research groups that rely on foundry access could benefit from a more diverse supply chain. However, Intel's foundry business still faces stiff competition from TSMC, which dominates the global market.
Analysts have noted that the Synopsys-Intel tie-up is critical for Intel's turnaround strategy. 'Certified EDA flows are essential for any foundry to attract design wins,' said a semiconductor analyst at a London-based research firm. 'Without them, customers face higher costs and longer time-to-market. This announcement gives Intel's 14A node a credible path to adoption.'
Intel's 14A process is part of its 'five nodes in four years' roadmap, aiming to reclaim process leadership. The company has been courting external foundry customers, including Arm-based chip designers and AI accelerator startups. For UK investors, the news comes amid broader market caution over global chip demand, though advanced node capacity remains a strategic priority for governments and tech firms alike.